Position: Senior VLSI Engineer
Company: Inomize
Location: Netaniya
Description:
BSC/BSEE or MSC/MSCEE from known university only - Must.
Minimum 5 years of experience in logic design using Verilog- Must.
Experienced with architecture, specs, documentation and Verilog/VHDL coding- Must.
Knowledge of USB, DDR2/3 and modem PHY designs – advantage.
Capable of leading small teams- advantage.
Experience in full VLSI project flows - advantage.
Knowledge in verification processes – an advantage
Contact: jobs @ Inomize.com
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